The challenges presented by PAM-4 high speed serial technology require a higher level of test and measurement performance than ever before. This paper investigates the evaluation complexities of PAM-4 interconnects at high data rates.
In order to select or develop a clock generator to use in your design or to ensure that the supplied system clock has the proper performance, you'll need to consider phase noise, jitter, wideband noise and spurs as performance indicators.
This application note with the accompanying software tool allows engineers without in-depth knowledge of DPD or remote programming to generate a DPD model and verify it against the DUT, based on the results of the K18D application.
This application note addresses the challenges that mode-agile or wartime reserve mode (WARM) radar and electromagnetic warfare (EW) threat emitters pose, as well as the architecture of cognitive artificial intelligence (AI) and machine learning (ML) systems and how they deliver effective RF countermeasures.
Radar sensors do have a direct influence on the automobile’s steering and control system and therefore need to be comprehensively tested in production. Rohde&Schwarz supplies reliable equipment with a small footprint to help you manage the challenges of automotive radar production lines.
Jamming works by increasing the power ratio of a jammer relative to a victim radar. Measure rage gate pull-off jamming using R&S®RTP high-performance oscilloscopes and the R&S®VSE-K6A phased array measurement option.
Platform verification with signals that reflect the real-world is always difficult but is always the best approach to the determine the true performance of the system. Performing testing in the real-world is not always possible for a number of reasons. To overcome these challenges, bringing the real world to the test lab is often the best way to demonstrate system effectiveness.
The CS101 test defines the requirements between 30 Hz and 150 kHz for equipment and subsystems alternating current (AC) below 30 Amps per phase and direct current (DC) input power leads. This test is used to increase the confidence that a device will be able to withstand signals coupled onto input power leads without malfunction or degradation of expected performance.