The ArchiTek™ FPGA Development Suite is designed to allow FPGA design engineers to add custom IP to a number of Pentek's Talon recording systems. FPGA IP can be added to the recorder to provide real-time, on-the-fly digital signal processing during the data acquisition process, greatly reducing the time associated with post-processing recorded data. ArchiTek provides a simple development environment that allows engineers to add FPGA IP such as threshold detection, spectral filtering, digital downconversion, demodulation or any other digital signal processing technique required.
ArchiTek works together with Pentek's Navigator FPGA Development Kit (FDK) and Board Support Package (BSP) to provide a simple development environment that steps engineers through the process of integrating custom IP into the recorder. It includes SystemFlow API extensions and example projects that demonstrate custom FPGA IP integration along with modifications to the recording system's control interface. The suite also allows FPGA developers to add additional channels to the recording system, so users can record both processed and unprocessed data simultaneously.
For more in-depth information on the ArchiTek FPGA Development Suite, download the datasheet, or visit the webpage.