News | June 28, 2005

TI Introduces High-Performance Clock Synthesizer And Jitter Cleaner

Dallas -- Texas Instruments Incorporated (TI) introduced a clock synthesizer and jitter cleaner that addresses customers' growing requirement for higher performance and increased design flexibility in applications such as 2.5G/3G wireless base stations, data communications, medical imaging, and test and measurement.

The CDCM7005 provides precise, stable frequencies for signal-chain devices such as analog-to-digital converters, digital-to-analog converters, digital upconverters and digital downconverters. It offers a phase noise of -219 dBc/Hz, a phase jitter performance of 162 fs and 232 fs, and maximum output skew of 20 ps. This performance allows data converters such as ADCs to be undersampled at higher input frequencies while delivering a high signal-to-noise ratio.

The CDCM7005 offers features that maximize design flexibility, including serial peripheral interface logic for programming and individual support control. The device synchronizes a voltage-controlled crystal oscillator frequency up to 2.2 GHz to one of two reference clocks to deliver high-frequency, clean clock outputs. The outputs can be divided by 1, 2, 3, 4, 6, 8 or 16 divide ratios and delivered at LVCMOS and LVPECL levels.

Other useful features include the device's bias voltage pin, which allows it to supply the correct voltage to a single-ended VCXO, eliminating the need for external resistors and thereby simplifying the design. In addition, the CDCM7005 supports frequency hold-over mode and fast-frequency locking for failsafe and increased system redundancy.

The 3.3-V CDCM7005 is available in industrial temperature range from TI and its authorized distributors in either a 64-pin, 0.8-mm ball-grid array or 48-pin, 0.5-mm quad flat no-lead package. An evaluation module is also available.

SOURCE: Texas Instruments Incorporated