RF Power Amplifier Simulation In Envelope Elimination And Restoration Operation
By D. Cartalade, Technical Marketing Engineer, Mentor Graphics
The purpose of this application note is to demonstrate advanced RF simulations of a Class-C power amplifier in 0.25um CMOS technology, with an Envelope Elimination and Restoration (EER) architecture.
Modern wireless systems such as IEEE802.11g or UMTS make heavy use of non-constant envelope modulation to increase the spectral efficiency. In the case of an Orthogonal Frequency Division Multiplex (OFDM) signal, the envelope is highly variable, according to the number of sub-carriers. Because of this varying envelope, non-linear power amplifiers are not directly suitable for these applications. Linear power amplifiers such as Class-A or Class-AB are not suitable either, as they provide a low Power-Added Efficiency (PAE), which is a critical issue for the lifetime of a battery. Among the available techniques to solve this dilemma, the Envelope Elimination and Restoration architecture uses a non-linear power amplifier with high PAE, with non-constant envelope modulation. Thus, the power consumption of the emitter is reduced without corrupting the signal.
This application note presents a typical architecture for such a system and investigates in great detail the setup and results of the necessary RF simulations. The simulations are performed using the Steady-State and Modulated Steady-State analyses in Mentor Graphics' Eldo RF simulator.
The input signal is provided by a QAM-16 source. The design uses both SPICE descriptions for the Power Amplifier and behavioral models for the DC to DC converter. For the standalone PA analysis, characteristics such as power gain, Power Added Efficiency, S parameters and intermodulation products are simulated. For the whole EER architecture, the characteristics extracted are the modulation spectrum of the signals and the constellation diagram.
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