RF Engines Introduces 64 Channel Digital Down Conversion Core
ChannelCore64 allows designers to replace up to 16 specialist DDC ASIC devices with a single IP core for FPGA. ChannelCore64 is targeted at applications such as wireless base stations, satellite ground stations, and other multi-channel radio receivers.
Almost all radio receivers need to extract one or more relatively narrow channels from a much wider input spectrum in a process called down-conversion. The trend towards increased flexibility within this part of the system is enabling interoperability between different radio access technologies, permits dynamic reconfiguration of band-plans, and future-proofs investment in receiver systems. Ever increasing user demand for bandwidth coupled with new technologies such as MIMO, means that systems must be capable of supporting an increasing number of channels.
ChannelCore64 utilizes an approach to down-conversion that achieves massively greater silicon efficiency per channel and provides all of the configuration controls that are typically associated with ASIC based DDCs. The core fits within a Xilinx Virtex II Pro 30 FPGA device.
A bit-true Matlab model is available free of charge which allows designers to accurately simulate ChannelCore64 within their system context. The core is supplied under a simple licensing model, and custom variants, including up-converters, can be produced on request.
SOURCE: RF Engines Limited