REGISTER NOW: Signal & Power Integrity

Rohde & Schwarz and Menlo Microsystems invite engineers to a comprehensive seminar addressing the most pressing power and signal integrity challenges in modern high-speed digital systems. As ICs grow denser and digital systems faster, designers face ever-stricter requirements for voltage accuracy, current control, and signal fidelity. High-performance AI GPUs, xPUs, HPC platforms, and IoT devices demand precise power distribution and low-jitter clocks, while high-speed serial interfaces such as PCIe Gen 6 and beyond must maintain signal integrity under challenging conditions.

This seminar provides the tools, techniques, and best practices needed to meet these requirements. Participants will gain hands-on insight into measuring power rail noise, analyzing low-jitter clocks using both time- and frequency-domain methods, and evaluating PDN impedance and stability. Advanced signal integrity topics include high-speed serial interface analysis, interconnect evaluation with microwave network analyzers, and high-speed digital switch performance testing for reliable operation at data rates exceeding 80 Gbps.

Attendees will leave equipped with actionable knowledge for designing, testing, and measuring next-generation digital systems, including AI accelerators, high-performance computing boards, and high-speed communication devices. The session emphasizes practical strategies for ensuring system reliability, optimizing signal quality, and leveraging modern instrumentation to address both current and emerging challenges in power and signal integrity. Whether your focus is design, validation, or troubleshooting, this seminar is essential for engineers working on cutting-edge high-speed electronics and high-density IC applications.