- Two 200 MHz 16-bit A/Ds
- Four wideband DDCs and up to 762 narrowband DDCs
- DDC Output Bandwidths from 20 MHz to 20 kHz
- Independent Tuning on All DDCs
International Microwave Symposium -- Pentek, Inc., recently announced the newest member of its highly popular Jade family of high-speed data converter XMC FPGA modules: the 2-channel Jade Model 71865, a 200 MHz 16-bit A/D channelizer with 762 narrowband digital down converters (DDCs) and 4 wideband DDCs, based on the Xilinx Kintex UltraScale FPGA. The Model 71865 is an economical and energy efficient, complete software radio receiver solution for commercial, military and government high-channel count applications.
“Today’s crowded and expensive RF spectrum is packed with a diverse variety of voice video, and data channels,” said Rodger Hosking, vice-president of Pentek. “High-density digital receivers are essential to efficiently acquire and effectively monitor these signals for quality of service, surveillance and security applications. Emerging applications such as 5G wireless push the requirements even further.”
Factory Installed IP Advances Development
The Model 71865 functions include two A/D acquisition IP modules for simplifying data capture and transfer. Each acquisition IP module contains a powerful controller for all data clocking, triggering and synchronization functions. From each of the two acquisition modules, A/D sample data flows into identical IP modules consisting of banks of wideband and narrowband DDCs. Finally, data is delivered to four DMA controllers linked to the PCIe Gen.3 x8 interface for transfer to a signal processor.
The four wideband DDCs can be set for decimation values between 8 and 128 in steps of 4, providing usable output bandwidths from 1.25 MHz to 20 MHz. The wideband DDCs can be quite effective in locating signals of interest.
Each of the six narrowband DDC banks can be configured to operate in three different modes, where each mode provides a different quantity of DDC channels and range of decimations. Output bandwidths range from 20 kHz to 1.25 MHz. All DDCs can be independently tuned from 0 Hz to 200 MHz with 32 bits of resolution.
Three banks of resampling filters accept input samples from each narrowband DDC at one sample rate and deliver output samples at another rate. Resampling filters are often used for better symbol recovery of signals using modern digital modulation schemes. Programmable ratios ensure flexibility to cover a wide range of wireless standards.
Pentek’s Navigator BSP provides a full suite of high-level C-callable libraries that support all features of the Model 71865 and demonstrate all of its functional modes with examples. The software package is provided with complete source code allowing the user to modify and integrate this functionality into the end application. Navigator BSP also includes an extremely useful Signal Viewer utility that allows developers to view digitized signals from the output samples of any DDC in time and frequency domain.
Pre-Configured SPARK System Ready for Immediate Use
SPARK development systems are ready for immediate operation with software and hardware installed. In many applications, the SPARK development system can become the final deployed application platform.
Pentek, an ISO 9001:2015 certified company, designs and manufactures innovative commercial and rugged DSP boards and real-time system recorders for commercial, government and military systems including radar, communications, SIGINT, defense, medical and industrial control applications. Pentek offers powerful VPX, FMC, FMC+, AMC, XMC, cPCI, and PCIe board solutions featuring high-performance Xilinx FPGAs. Pentek equips all boards and recorder products with high-performance I/O including gigabit serial interfaces, powerful software development tools and offers strong DSP software support.