News | July 16, 2003

Neolinear Announces Powerful New Neocircuit Functionality

Support for Block-Level Sizing, DFM, Local Optimization, RFDE Integration and Rapid Analog Design Dramatically Enhance Design Productivity

PITTSBURGH, PA -- Neolinear today announced NeoCircuit® v2.2 for automated sizing and verification of custom analog, RF and digital circuit topologies using the customer's simulation environment.

With v2.2, NeoCircuit offers significant new capabilities.

  • Block-Level Sizing – enhanced sizing algorithms and tight integration with Fast-MOS simulators including Nassda's HSIM and Cadence's UltraSim enables block-level design sizing and verification. "We appreciate the integration of these revolutionary technologies from Neolinear and Nassda. In our test case, we were able to automatically size a 6,000 device mixed-signal circuit for a 64K SRAM memory using only five HSIM licenses. We were able to shorten design turn around time (TAT) to one-tenth (1/10) by using NeoCircuit." stated Akinori Shibayama, Senior Engineer of System LSI Technology Development Center in Matsushita Electric's Semiconductor Company.

  • Design for Manufacturability (DFM) – Increasingly, designers must modify transistor sizes and device spacing to account for local and global mismatch so as to optimize yield and circuit manufacturability. NeoCircuit now includes sensitivity and correlation analysis of Artist-generated Monte Carlo results including scatter plots. This enables designers to readily determine and account for mismatch effects.

  • Local Optimization – in addition to offering the industry's leading automatic algorithms for circuit sizing without a starting point, NeoCircuit now includes multi-variable, multi-goal local optimization algorithms that can be used by designers to find enhanced circuit alternatives when an existing circuit or starting point is available.

  • Visualization – sized circuits can now be quickly visually inspected and analyzed using built-in graphical techniques including correlation matrices and parallel coordinates.

  • Rapid Analog Design (RAD) – NeoCircuit is now available in a tightly integrated engineering change order (ECO) solution with NeoCell for rapid analog design (RAD). RAD's tight integration with the Cadence custom design flow and popular commercial extractors reuses constraint information from NeoCircuit and NeoCell, allowing designers to quickly re-size devices and adjust layouts achieving rapid design closure. Design iterations between circuit sizing and layout are minimized enabling fully verified designs faster than ever before.

  • RFDE Integration – NeoCircuit-RF's integration with Agilent's ADS simulator and the Cadence Analog Design Environment has been enhanced to include RFDE integration.

"Neolinear continues to advance mixed-signal design automation at a blazing pace," stated Tom Beckley, president and CEO of Neolinear. "This new NeoCircuit release provides block-level analog design capabilities, enhanced DFM and powerful new local optimization algorithms. But most importantly, all Neolinear technology can be readily deployed in existing manual design flows enabling automated rapid initial design and powerful design re-use."

About Neolinear
Neolinear, the mixed-signal IC design automation leader, develops software and solutions for rapid design and re-use of analog, RF, mixed-signal and custom digital circuits. The product portfolio includes NeoCircuit and NeoCircuit-RF which are used to automatically size custom circuits utilizing the customer's existing simulation environment and NeoCell which automatically places and routes analog cells. Customers can ramp up quickly through the use of NeoIP, a library of analog cells fully constrained for use in the NeoCircuit and NeoCell design environment. In combination, Neolinear's rapid analog design (RAD) solution provides an order of magnitude increase in design productivity. Neolinear's corporate headquarters is at 583 Epsilon Drive, Pittsburgh, Penn., 15238. Visit Neolinear at www.neolinear.com.


Neolinear, NeoCircuit, NeoCell and Accelerating Mixed-Signal Design are registered trademarks and NeoCircuit-RF and NeoIP are trademarks of Neolinear. All other product and company names are trademarks and registered trademarks of their respective companies.