Cadence Mainstreams System-In-Package Design

Nice, France -- Cadence Design Systems, Inc. announced the availability of what the company claims as the industry's first complete set of EDA products and capabilities that enable the mainstreaming of System-in-Package (SiP) IC design. The Cadence solution addresses the limitations inherent in the current "expert engineering" approach to SiP design by providing an automated, integrated, reliable, and repeatable process to meet the escalating demand for wireless and consumer products. New products include the Cadence Radio Frequency (RF) SiP Methodology Kit, two new RF SiP products, Cadence SiP RF Architect and Cadence SiP RF Layout, and three new Digital SiP products, Cadence SiP Digital Architect, Cadence SiP Digital SI, and Cadence SiP Digital Layout.

SiPs are used extensively in wireless, networking and consumer-electronics applications such as cell phones, Bluetooth modules, WLAN modules and network packet switching. According to Semico Research Corporation the revenue for SiP contract manufacturers will reach $747.9 million by 2007. With the Cadence SiP solution, companies have the opportunity to expand this market as a broader range of designers gain the ability to bring together many IC and package assembly technologies to create highly integrated products with optimized cost, size and performance.

"We selected Cadence for RF SiP modules because they had the technology, capability and commitment to work with us to define a solution that can be broadly adopted across Freescale enabling us to bring our RF SiP methodology to the next level," said Nigel Foley, analog/RF methodology manager, Freescale Semiconductor, Inc.

The RF SiP Kit includes new Cadence SiP RF products and methodologies for automating and accelerating the entire design process of RF SiPs for wireless communications applications. It also provides customer-proven SiP implementation methodologies based on an 802.11 b/g wireless local-area-network (WLAN) design. This enables fast and streamlined adoption of the SiP design technique with low risk. This Cadence Kit, along with the previously released Cadence RF Design Methodology Kit, expands Cadence's RF design offerings in the wireless segment.

"As a leading provider of foundry solutions for RF ICs, Jazz Semiconductor recognizes the need to address the industry trend towards the use of SiPs in reducing system cost," said Marco Racanelli, vice president of technology and engineering, Jazz Semiconductor. "By integrating our process design kits (PDKs) with the Cadence RF SiP Methodology Kit, Jazz supports Cadence in streamlining the RF SiP design cycle for our joint customers to provide better performance, optimized technology and faster time to market."

Cadence SiP solutions seamlessly integrate into Cadence Encounter for die abstract co-design, Cadence Virtuoso for RF module design, and Cadence Allegro for package/board co-design for end products that are optimized for size, cost, and performance.

"The new Cadence RF SiP Methodology Kit addresses key SiP design challenges such as the lack of integrated tools and methodologies for integrated system, IC, package, and board design and the inability to simulate, verify and analyze complete SiP designs," said Charlie Giorgetti, corporate vice president of Product Marketing at Cadence. "With this kit, customers will be able to realize the benefits of SiP quicker and with reduced risk in sharp contrast with previous solutions."

SOURCE: Cadences