Cadence Digital And Custom/Analog Flow Certified By TSMC For Latest N4P And N3E Process Technologies
- Cadence and TSMC Team Up to Accelerate Design Innovation for Next-Generation Mobile Devices, Automotive, AI and Hyperscale Computing
- Joint customers can design with certified enhanced N4P and N3E Process Design Kits (PDKs)
- Cadence processes optimized for N4P and N3E PDKs provide engineers with easy analog migration, optimal PPA and faster time to market
Cadence Design Systems, Inc., a global leader in electronic design innovation, announced that Cadence digital and custom/analog design flows have passed TSMC N4P and N3E process certification, supporting the latest Design Rule Manual (DRM) and FINFLEX technology. The ongoing collaboration between Cadence and TSMC provides process design kits (PDKs) for TSMC's N4P and N3E processes to accelerate design innovation in advanced process operations, artificial intelligence and hyperscale computing. Customers are already using the latest TSMC process technology and certified Cadence processes to achieve optimal power, performance and area (PPA) goals and accelerate time-to-market.
The latest N4P and N3E digital full process certification
Cadence works closely with TSMC's R&D team to ensure that the digital process meets TSMC's N4P and N3E process certification requirements. Cadence fully integrates RTL to GDS digital whole process, including Cadence Innovus design implementation system, Quantus extraction solution, QuantusFS Solver, Tempus Timing Signoff Solution and ECO Option, Pegasus Verification System, Liberate Characterization Solution and Voltus IC Power Integrity Solution and Voltus-Fi Analog Power Integrity Solution. In addition, Cadence Genus synthesis solutions and predictable iSpatial technology also support TSMC's N4P and N3E advanced process technologies.
Digital full-flow support for several key features of TSMC's N4P and N3E process technologies, including native mixed-height cell row optimization from synthesis to signoff engineering change (ECO) for optimal PPA; based on standard cell row placement; Implementation results are closely tied to signoff for faster design closure; enhanced with pillar support for better design performance; large library with a large number of multi-height, voltage threshold (VT) and drive strength cells; timing robustness Cell Characterization and Analysis; Reliability Modeling with Time-Aware STA; and CCSP Model Enhancements, which provide greater accuracy and simplified analytical characterization with Voltus IC Power Integrity Solutions.
Latest N4P and N3E Custom/Analog Process Certification
Cadence Virtuoso custom/analog tools have been certified for TSMC's latest N4P and N3E process technologies, including the Virtuoso Schematic Editor, Virtuoso ADE Product Suite and Virtuoso Layout Suite, as well as the Spectre Simulation Platform (covering its Spectre X Simulator, Spectre Accelerated Parallel Simulator (APS), Spectre eXtensive Partition Simulator (XPS), and Spectre RF options. A unique feature provided by the Virtuoso Design Platform is tight integration with the Innovus Design Implementation System, a common library-enhanced hybrid The realization method of the signal design.
The Custom Design Reference Flow (CDRF) also enhances support for the latest N4P and N3E process technologies. The Virtuoso schematic editor, Virtuoso ADE product suite and integrated Spectre X simulator help customers effectively manage corner simulation, statistical analysis, design centralization and circuit optimization. Virtuoso Layout Suite has achieved efficient layout implementation, providing customers with a variety of capabilities, including a unique row-based implementation method, interactive assistance functions for placement, routing, filling and virtual insertion; enhanced simulation migration and layout reuse capabilities; Integrates parasitic extraction, electromigration/supply voltage drop (EM-IR) inspection, and also incorporates physical verification capabilities.
"By continuing to work closely with Cadence, we ensure customers can use our state-of-the-art N4P and N3E technologies and certified Cadence digital and custom/analog processes with confidence," said Dan Kochpatcharin, head of TSMC's Design Infrastructure Management Group. This joint effort combines TSMC's technological advancements with Cadence's leading design solutions to help our mutual customers meet stringent power and performance requirements and quickly bring their next-generation silicon innovations to market."
Dr. Chin-Chi Teng, Senior Vice President and General Manager of the Digital and Signoff Business Group at Cadence, said, "Through Cadence's long-term and ongoing partnership with TSMC, we are enabling mutual customers to leverage our latest technology for their PPA and productivity. Goal. Our latest collaboration with TSMC reaffirms our commitment to helping customers achieve design excellence through our processes and TSMC’s advanced technology, and we are always pleasantly surprised by the innovations they create.”
Cadence's digital and custom/analog advanced process solutions are optimized for TSMC's N4P and N3E process technologies and support Cadence's Intelligent System Design strategy to help customers achieve superior system-on-chip designs. For more information, visit www.cadence.com/go/advndn4pn3e .
About Cadence
With over 30 years of experience in computing software, Cadence is today a leader in electronic design. With Intelligent System Design as its core strategy, the company provides software, hardware and semiconductor IP to assist electronic design from concept to application realization. Cadence serves customers around the world, creating cutting-edge and innovative electronic products from chips, printed circuit boards to overall systems for applications in today's most advanced computing, 5G communications, automotive, mobile, aerospace, consumer electronics, industrial and healthcare. active market. For 8 consecutive years, Cadence has been named one of the 100 Best Workplaces in the World by Fortune Magazine. For more information, visit cadence.com .
Source: Cadence