APLAC Launches Version 7.92 Of Circuit Design Analysis Tool

Espoo, Finland -- N/A has announced the availability of version 7.92 of the company's APLAC circuit design and analysis tool. The APLAC system combines powerful RFIC and analog simulation with a broad range of functions for analysis and optimization.

APLAC 7.92 introduces enhanced measurement support for mixers, amplifiers, and oscillators. Measurement support can be ordered to handle repetitive simulation tasks, enabling the designer to manage a larger-scale simulation with more focus and capacity. The model-order reduction analysis method is implemented for faster analysis of linear circuits.

The new APLAC release includes several fresh, up-to-date features and models for RFIC and system level design. New and enhanced technologies include new WLAN system blocks, BSIM4 v4.30, and MOS11, as well as a new PinDiode model.

In addition, the APLAC Connectivity tool integrates the APLAC Simulator seamlessly with leading design frameworks such as Cadence Virtuoso and Mentor Graphics Design Architect, RF Architect, and PowerLogic.

To learn more about the new release, download the PDF file What's New In APLAC 7.92 and watch the APLAC 7.92 Flash Demos.

About APLAC Solutions Corp.
APLAC Solutions Corp. develops and markets simulation and analysis software for analog and RF designers. APLAC has been used in designing over 30% of all mobile phone RFIC circuits. Innovative applications of the software are also found in MEMS and acoustic design.

APLAC enhances cost effectiveness and shortens design time. Its capabilities range from integrated circuits to circuit board- and system-level design, from direct current to RF and microwave frequencies.

Source: APLAC Solutions Corp.