Designing and verifying designs to today's complex signal formats can present some interesting challenges. Designs can be verified in simulation and they can be verified after all of the hardware returns from fabrication – but an intermediate level of verification early in this design/fabrication cycle can be difficult to achieve due to the need for prototype hardware. Fabrication cycle time often results in inefficiencies while designers wait for hardware before performing verification testing. Add a couple of design iterations to this, and design time can really add up.
In particular, verifying Bit Error Rate (BER) can present a real challenge to RF engineers. RF engineers designing RF receivers may not have access to the baseband functionality required to perform coded Bit Error Rate measurements. This can present a barrier to verifying the performance of the RF hardware against a coded BER metric, which is frequently a key receiver design specification in today's digital communications signal formats.
Some receivers also have an Analog-to-Digital (A/D) converter at the output of the RF receiver, which adds additional complexity in both evaluating the RF performance after the Analog-to-Digital conversion process as well as evaluating BER for a mixed signal RF/digital signal path.
This application note discusses how Connected Solutions from Agilent Technologies can help for BER verification applications for RF/IF-to-digital receiver topologies.
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