RFIC Passive Device And Interconnect EM Simulation Challenges
Several Cadence Virtuoso-based EM simulation tools model process design kit (PDK) spiral inductors today, including PeakView from Lorentz Solutions, VeloceRF from Helic, EMX from Integrand Software, and Blink from Sonnet Software. Typically PDK-specific, these EM tools offer simulation times fast enough to simulate a spiral inductor in less than five minutes. As more and more silicon integrated circuit designs use nodes lower than 65nm, new challenges appear in the modeling of RF passive device and interconnect using electromagnetic (EM) simulation. Beyond simply characterizing one spiral inductor, there is an increasing need to include interconnect transmission lines in the modeling, employ more than 20 ports with de-embedding, and simulate vias and packaging including the complete dielectric stack up of a printed circuit board below the integrated circuit stack up.
The higher signal frequencies possible with lower nodes prescribe the use of transmission lines and analysis of the coupling of interconnect along with passive devices. The ability to simulate transmission lines, and general interconnect metal layout shapes, facilitates what integrated circuit designers call “arbitrary layout extraction.” As basic as it may seem to an RF engineer accustomed to designing with transmissions lines, simulating a simple transmission line can challenge a fast EM solver that routinely handles silicon spiral inductors for particular foundry processes.