Pentek Introduces Onyx Virtex-7 Transceiver 3U VPX Rugged Board For Communication And Radar Systems
- 2-Channel 500 MHz A/D with Digital Down Converter (DDC)
- 2-Channel 800 MHz D/A with Digital Up Converter (DUC)
- Xilinx Virtex-7 FPGA supports custom IP with GateFlow Design Kit
- Advanced GateXpress technology for FPGA reconfiguration across PCIe
Pentek, Inc., recently announced the newest member of its highly popular Onyx family: the Model 52751, a two-channel, wideband transceiver 3U VPX board, based on the Xilinx Virtex-7 FPGA. The Model 52751 is suitable for connection to HF or IF ports of communications or radar systems. Its built-in data capture and generation features make it an ideal turnkey solution without the need to develop additional FPGA IP.
The Model 52751 includes two 500 MHz 12-bit A/Ds followed by two DDCs, and two 800 MHz 16-bit D/As with a DUC. Factory installed Virtex-7 FPGA functions include two A/D acquisition modules, a D/A waveform generation IP module, data multiplexing, channel selection, data packing, gating, triggering, synchronization and memory control. Programmable decimation and interpolation ranges for each DDC and DUC cover transceiver signal bandwidths from 4 kHz to 200 MHz.
Target applications for the Model 52751 include radar, digital RF memory, wideband communication, SIGINT and electronic countermeasures systems. Virtex-7 performance enhancements to the Model 52751 allow more data to be collected and processed faster than ever before. For airborne SIGINT and monitoring tasks, more terrain may be covered in less time, reducing the risk of detection. In communications-type applications, more signals can be captured and classified in real time through more detailed analysis. Ground-penetrating radar systems reap the benefits of wider bandwidths for generating and processing radar pulses to detect buried munitions or explosives that might otherwise have been obscured with noise.
Development Tools And Software Support
GateXpress PCIe Configuration Manager is a sophisticated FPGA-PCIe hardware engine for managing the reconfiguration of the FPGA. At power up, the GateXpress manager immediately presents a PCIe target to the host computer for discovery and enumeration, giving the FPGA time to load from FLASH. Once booted, the GateXpress manager offers multiple options for dynamically reconfiguring the FPGA with a new IP image, handling the hardware negotiation and streamlining the loading task. GateXpress also allows dynamic FPGA reconfiguration across the PCIe interface through a runtime software task on the host computer.
A key benefit of the GateXpress manager is its ability to use a default power-up configuration image in non-volatile FLASH memory to enable booting of a system. Once booted, the sensitive mission signature configuration image can then be uploaded into the FPGA by the system host from a disk file, a network source, or even a radio link. Thus, no non-volatile version of the sensitive mission image exists in the module, affording a high degree of security in the event of loss or capture of the system.
For systems that require custom functions, IP can be developed using the Pentek GateFlow FPGA Design Kit, extending or even replacing the factory-installed functions.
Pentek ReadyFlow software board support packages for high-level C-language development are available for Linux and Windows operating systems.
The Model 52751 3U VPX board is available with ruggedized and conduction-cooled versions. An additional 3U VPX board is available, the Model 53751, which includes a crossbar switch to support additional PCI Express backplane routing options. The board is also available as an XMC module, Model 71751, designed for both rugged and commercial environments; in cPCI, Models 73751 & 72751; in AMC, Model 56751; and in PCIe, Model 78751.
SOURCE: Pentek, Inc.