3 Big RFIC/MMIC Design Challenges – And How To Solve Them
By Paul Kruczkowski, Editor
RFIC/MMIC design is difficult work. Engineers are tasked with packing diverse functionality into these devices, including low noise and power amplification, mixing, phase shifting, and switching, to name a few. New pressures are constantly emerging, making the RFIC/MMIC designer’s job even more demanding. Three of the biggest current design challenges that stand out to me are: higher frequency requirements, shrinking footprints/increased integration density, and 3D discontinuities.
Higher Frequency Requirements
Demand is increasing for RFICs and MMICs that operate at higher frequencies due to the need for more bandwidth and higher throughput. For example, the 802.11ad standard, also known as WiGig, defines a tri-band Wi-Fi solution that adds a 60 GHz band to the traditional 2.4 GHz and 5 GHz bands to achieve theoretical data throughput of 7 Gbits/s. Higher frequency integrated circuit designs for WiGig and other emerging wireless standards require higher dimensional accuracy to avoid performance issues — even slight variations in models and layouts can greatly affect design outcomes.
Shrinking Footprints and Increased Integration Density
Engineers are under great pressure to reduce the overall footprint and to increase integration density of new RFIC/MMIC designs. The mobile handset market is a driving force behind this engineering challenge. Handset vendors are trying to jam more and more radios and antennas into compact devices like the new iPhone 5, which measures only 4.87” x 2.31” x 0.30”. If an RFIC/MMIC designer can increase the functionality or reduce the footprint of a new chipset by 10%, it represents both a significant manufacturing cost savings and a distinct competitive advantage in the marketplace. One consequence of shrinking designs is that models break down as circuit elements and component structure are close enough to couple. Plus, there are no design models for coupled wire bonds.
Introducing new technologies that generate massive amounts of heat, such as gallium nitride (GaN), into compacted modular RFICs/MMICs creates additional design challenges. To remove heat from the IC, the engineer may have to alter the ball grid array (BGA) or interposer interface or even introduce 3D discontinuities like a heat sink on top. These additional design requirements to remove heat are often imposed by the mechanical engineer in the group to prevent a meltdown. It turn, they necessitate additional analysis on the part of the RF engineer to ensure that the heat removal solution has not adversely impacted the RF performance of the design.
Solution: 3D FEM EM Simulation
All three of these RFIC/MMIC design challenges can be solved with RF/microwave circuit design software with 3D finite element method (FEM) electromagnetic (EM) simulation capability. In the case of problem number one, high-frequency design itself does not require full 3D FEM analysis, but when non-planar circuit elements are present, planar 3D EM simulators are unable to adequately analyze these structures. Full 3D FEM analysis is the only way to account for the interactions between closely spaced structures like ball grid arrays or wire bonds, because no behavior models exist that can accurately address these situations. Finally, calling on the full 3D FEM tool is the only way to accurately measure the effects of 3D discontinuities, like heat sinks, have on circuit performance.
Two new 3D FEM EM software releases made their debut at European Microwave Week last week. AWR demoed Analysts 2012, which operates within its Microwave Office circuit design environment, and Agilent demoed EMPro 2012, which operates within its Advanced Design System (ADS) tool. I had my own preshow demos of these two software releases, and they both had full 3D FEM simulation capabilities that effectively addressed these RFIC/MMIC challenges. As an added bonus for RFIC/MMIC designers, I noticed that these 3D FEM simulators are tightly integrated within their respective circuit design environment. Both allow the designer to export the 3D layouts from the circuit design tool for full 3D FEM analysis, and both give them the ability to run the 3D analysis directly from the circuit design environment, which not only conquers the design challenges, it streamlines the design flow.
What design challenges are you having? Is 3D FEM analysis the answer your design issues?