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Theory And Application Of A Sampling Phase Detector

January 18, 2006

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By Skyworks Solutions, Inc.

The phase lock of a Voltage Controlled Oscillator for VHF, UHF and microwave frequencies is very important in communications and radar application. It combines the far-out phase noise of fundamental oscillators, especially in the microwave frequency range (100 kHz away from carrier frequency and beyond), the excellent long-term stability, and the close-in phase noise of a crystal oscillator (from carrier frequency to 100 kHz away).

A voltage-controlled oscillator can be phase locked by two methods:

1. Digital phase lock: This is usually achieved by using a frequency divider to divide the higher frequency of the VCO to the same frequency of the crystal reference. A digital phase detector is then used to acquire the phase lock. The advantage of this method is that it is self-acquiring and can operate at very low frequencies. It is widely used at low frequencies from 1 MHz up to 3 GHz. However, this method also has two disadvantages. First, the noise floor of the divider will limit its phase noise; and second, at microwave frequencies it will not be economical.

2. Analog phase lock: This is achieved by using an SRD as a comb generator to create a comb of reference frequencies to the frequency of the VCO. The phase detecting is accomplished by using a mixer to detect the phase differences between the reference and the VCO. The Skyworks sampling phase detector is designed to perform the analog phase lock in a simple and more economical way.

The sampling phase detector used in phase lock of a VCO operating by the theory of principles of feedback control systems.

The error signal output of the sampling phase detector Vbeat = Em sin is the differential phase error between the VCO and the crystal oscillator. The loop amplifier amplifies the error signal to the VCO and corrects the VCO to be in phase with the crystal oscillator. At the same time, the loop amplifier acts as a low pass filter and filters away the crystal frequency.

This method of phase lock will achieve the lowest phase noise possible beside the theoretical degradation of 20 log N, where N is the multiplication factor between the crystal oscillator and the VCO. The other circuits that will generate additional noise are the driver amplifier, sampling phase detector, and the loop amplifier. They may all contribute to further degradation in phase noise (typically 1 dB if the crystal oscillator has a noise floor of -155 dBc/Hz or 3 dB if the crystal oscillator noise floor is -160 dBc/Hz).

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Application Note: Theory And Application Of A Sampling Phase Detector

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