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As microprocessor clock frequencies increase, and their ASIC power supply voltages decrease to 2.0V and below, the power distribution system of IC packages is becoming an increasingly important design challenge. A number of vias are used both to connect power planes at multiple locations to each other, and also multiple ground planes to each other. An important design issue is how to determine the number of power and ground planes, and the number and the locations of power and ground vias, for a given power supply noise margin. Electrical performances of power supply systems have often been characterized by effective inductor models which can be used to estimate power supply noise at low frequencies. For high-end packages, the frequency range of interest is from DC to a few GHz. Within this frequency range, there can be several package resonant frequencies, and the effective inductor model may become totally invalid.

Accurate characterization of power supply systems necessitates electromagnetic field simulations to take into account various electromagnetic interactions in packages. This article investigates the power supply noise in multilayered IC packages. CST MICROWAVE STUDIO® (CST MWS), based on the Finite Integration technique (FIT), is used for the numerical simulation and the results are validated by means of measurements performed with a VNA.

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•Application Note: Signal Integrity Analysis Of A Complex Multi-Layered Package