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RSSInductance And Capacitance Modeling Of RF Board And High Speed Package Interconnects Based On Planar EM Simulation
February 26, 2008
Abstract
This article describes a methodology to simulate the distributed inductive and capacitive effects introduced by the interconnects on RF board circuits and high speed packages. This methodology is based on an equivalent RLC model, derived directly from the discretization of the planar electromagnetic field equations. We discuss the relation of the voltage and the current in the equivalent network with the electric and magnetic fields in the physical circuit. We also present a new technology based on mesh reduction to eliminate redundancy and hence reduce the order of the equivalent RLC network. This new technology comprises a generalization of the basis functions used in the disretization of the surface currents. The generalized basis functions allow for a more efficient meshing of complex geometrical structures in terms of polygonal shaped cells. The increased simulation performance is demonstrated in the examples. We present numerical simulation results for two real-life examples: an RF board interconnect layout and a high-density ball-grid array package.
Introduction
The need for higher bandwidth has pushed up the operating frequencies and the integration of functionality in modern High Speed Digital packages (BGA's) and RF board applications. As a consequence, accurate modeling of the distributed inductance and capacitive effects introduced by the interconnects has become crucial in the physical design and verification of RF circuits and systems. Signal contamination issues need to be addressed in the early phases of the design to maintain the integrity of the analog and digital signals on chip, package and board level. Traditional approaches to model the interconnection effects are based on static inductance and capacitance calculations with tools such as FastCap and FastHenry. The extracted resistance, inductance and capacitance are then combined to construct a netlist. While extracting the inductance, the current distribution is determined solely by the resistance and the inductance of the conductors. This may lead to significant inaccuracies at higher frequencies as the capacitances start to strongly affect the current distributions. The same problem arises with approaches using the Partial Equivalent Element Circuit (PEEC) method. They inherently lack the ability to accurately model the current distributions at higher frequencies and eventually fail to predict correct RLC models at these high frequencies.
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