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By Henrik Morkner, Avago Technologies

Introduction

Packaging has always been the "Achilles Heel" of extracting the maximum microwave performance out of any IC technology. The inherent parasitic capacitance and inductance associated with bond wires, lead frames, and encapsulating dielectric materials dominate the final products high frequency performance. One way to solve this problem is to eliminate parasitic causing factors and make the IC become the package. This is the basis of WSP (Wafer Scale Packaging).

While a relatively simple concept, WSP can be hard to implement. Problems that must be addressed include cracking, environmental protection, solder tolerance and cost.

Avago Technologies has been experimenting with WSP for over 10 years. It was originally developed to provide a low cost hermetic package for FBAR MEMs silicon technology. Leveraging off silicon wafer bonding technology, the WSP solution was applied to GaAs PHEMT IC fabrication. Avago first introduced a family of WSP GaAs products in 2008 and continued to develop and introduce new products in 2009.

This paper explains the general construction and fabrication of Avago's commercial WSP process. The advantages and disadvantages of this technology are compared candidly to more traditional microwave technology through millimeter wave packaging techniques. Finally, several commercially available examples are shown as well as a glimpse into future developments.

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•White Paper: GaAs-Based Surface Mount Wafer Scale Package MMICs For DC To 45 GHz Applications